The Fetch–Decode–Execute Cycle

Spec & Goals 3 min

AQA Spec 3.4.5 · Systems architecture — the fetch–decode–execute cycle

By the end of this lesson you can:

1. Name the three stages of the fetch–decode–execute cycle in order.
2. Describe what the CPU does during the fetch, decode and execute stages.
3. State the role of the Program Counter, MAR, MDR and accumulator.

Warm-Up 5 min

Last lesson you met the CPU and the Von Neumann architecture, where instructions and data share main memory.

Quick starter

If instructions live in main memory, what is the very first thing the CPU must do to run one?

Key Concept — the cycle the CPU never stops 14 min

The CPU runs programs by repeating one cycle again and again. It is called the fetch–decode–execute cycle.

The three stages

• Fetch: the next instruction is copied from main memory into the CPU.
• Decode: the control unit works out what the instruction means.
• Execute: the CPU carries out the instruction — for example a calculation in the ALU, or storing data.

Once execute finishes, the CPU starts again with the next fetch. The cycle runs continuously while the computer is on.

The key registers

A register is a tiny, very fast store inside the CPU. Four registers do the heavy lifting in the cycle.

• The Program Counter (PC) holds the address of the next instruction.
• The MAR holds the address being read from or written to.
• The MDR holds the data fetched, or the data to be stored.
• The accumulator holds the result of a calculation.

Worked Example — the cycle and its registers 12 min

The diagram below shows the cycle as a loop. After execute, control returns to fetch for the next instruction.

Each stage relies on the registers. This table shows what each one holds.

Try It Yourself 12 min

📝 Exam Practice 10 min

Answer the way the examiner expects — the command word and the marks tell you how much to write.

Recap & Key Terms 3 min

The CPU runs programs by repeating the fetch–decode–execute cycle. It fetches the next instruction, the control unit decodes it, then the CPU executes it. The PC tracks the next address, the MAR and MDR move data to and from memory, and the accumulator holds results.

Fetch–decode–execute cycle

The repeating process the CPU uses to run each instruction in a program.

Program Counter

The register that holds the address of the next instruction; increases each cycle.

MAR

Memory Address Register — holds the address being read from or written to.

MDR

Memory Data Register — holds the data fetched from, or to be written to, memory.

Accumulator

The register that holds the result of a calculation done by the ALU.

Homework 1 min

Task (≤ 15 min): Draw the fetch–decode–execute cycle as a labelled loop, then write one sentence for each register (PC, MAR, MDR, accumulator) stating its role.