Syllabus & Goals 3 min
Cambridge 1.1 · Number systems Paper 1 · Computer Systems
By the end of this lesson you can:
- Add two positive 8-bit binary numbers, showing carries, and identify an overflow error.
- Carry out a logical shift left or right and state its effect (× 2 or ÷ 2 per place) and when it goes wrong.
- Use two's complement to convert positive and negative 8-bit numbers in both directions.
Textbook: Chapter 1, §1.1.4–1.1.6 (pp. 15–25)
Recap / Warm-Up 5 min
You can now convert between binary, denary and hex. Next you do arithmetic on binary numbers.
Quick starter
In denary, what is the largest number you can show with three digits? What happens if you add 1 to it?
Reveal the answer
999 is the largest; 999 + 1 = 1000 needs a fourth digit. A computer with a fixed number of bits has the same problem. That extra digit is called overflow.
Key Concept 14 min
1 · Binary addition
Add column by column from the right, just as in denary. In denary you carry when a column passes 9; in binary you carry when a column passes 1.
Two bits
| Add | Carry | Sum |
|---|---|---|
| 0 + 0 | 0 | 0 |
| 0 + 1 | 0 | 1 |
| 1 + 0 | 0 | 1 |
| 1 + 1 | 1 | 0 |
Two bits plus a carry
| Add | Carry | Sum |
|---|---|---|
| 0 + 0 + 1 | 0 | 1 |
| 0 + 1 + 1 | 1 | 0 |
| 1 + 0 + 1 | 1 | 0 |
| 1 + 1 + 1 | 1 | 1 |
2 · Overflow
An 8-bit register holds 0 to 255 (2⁸ − 1). If an addition produces a 9th bit, the true answer is too big to store. The 9th bit is lost, so the register keeps a value 256 too small. This is an overflow error.
More bits allow bigger numbers: a 16-bit register holds up to 65 535 (2¹⁶ − 1) and a 32-bit register up to 4 294 967 295 (2³² − 1).
00100011 = 35 — wrong by exactly 256.Diagram · Advaslearning Hub
3 · Logical binary shifts
A logical shift moves every bit left or right by a number of places. Bits that fall off the end are lost. Empty positions are always filled with 0.
- Shift left 1 place = × 2. Left 2 = × 4, left 3 = × 8 (× 2ⁿ for n places).
- Shift right 1 place = ÷ 2. Right 2 = ÷ 4, right 3 = ÷ 8 (÷ 2ⁿ for n places).
00011011 (27) shifted 2 places left. The two new right-hand bits are 0s. The result is 108 = 27 × 4.Diagram · Advaslearning HubThere is a limit. If a 1 is pushed out of the register, the result is wrong. After enough shifts the register holds only 0s — as if 112 × 32 were 0.
00011011 shifted 4 places left. A 1 falls off the left end, so the register shows 176, not 432. Too many shifts.Diagram · Advaslearning Hub4 · Two's complement — negative numbers
So far every number has been positive. To store negative integers, change one heading: the left-most bit (the most significant bit) is worth −128 instead of +128. All other headings stay the same.
| −128 | 64 | 32 | 16 | 8 | 4 | 2 | 1 |
|---|---|---|---|---|---|---|---|
| 1 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
This number is −128 + 16 + 2 + 1 = −109. The MSB tells you the sign: 1 = negative, 0 = positive. The range is −128 (10000000) to +127 (01111111).
11111111 is −1, not 255.Diagram · Advaslearning HubTwo ways to write a negative number such as −67:
- Method 1 — build it from −128. −67 = −128 + 61, and 61 = 32 + 16 + 8 + 4 + 1. So put 1s under −128, 32, 16, 8, 4 and 1:
10111101. - Method 2 — invert then add 1. Write +67 (
01000011), invert every bit (10111100), then add 1:10111101.
Worked Example 12 min
Worked example 1 · add 01011011 + 00101110
| 9th | 128 | 64 | 32 | 16 | 8 | 4 | 2 | 1 | denary | |
| 0 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 91 | ||
| + | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 0 | 46 | |
| carry | 1 | 1 | 1 | 1 | 1 | 1 | ||||
| sum | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 137 |
- Column 1 (right): 1 + 0 = 1, no carry.
- Column 2: 1 + 1 = 0 carry 1.2 in binary is 10 — write the 0, carry the 1.
- Column 3: 0 + 1 + 1 (carry) = 0 carry 1. Column 4: 1 + 1 + 1 = 1 carry 1.
- Column 5: 1 + 0 + 1 = 0 carry 1. Column 6: 0 + 1 + 1 = 0 carry 1.
- Column 7: 1 + 0 + 1 = 0 carry 1. Column 8: 0 + 0 + 1 = 1, no carry out.
- Answer: 10001001 = 137. Check in denary: 91 + 46 = 137 ✓.converting both numbers to denary is a free check on every addition.
Worked example 2 · add 11001010 + 01011001 (overflow)
| 9th | 128 | 64 | 32 | 16 | 8 | 4 | 2 | 1 | denary | |
| 1 | 1 | 0 | 0 | 1 | 0 | 1 | 0 | 202 | ||
| + | 0 | 1 | 0 | 1 | 1 | 0 | 0 | 1 | 89 | |
| carry | 1 | 1 | 1 | 1 | ||||||
| sum | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 1 | 35 |
- Add right to left with carries, exactly as before. The last column (128s) gives 1 + 0 + 1 = 0 carry 1.
- That final carry has no column to go into. It is the 9th bit.
- The 8 bits kept are 00100011 = 35. But 202 + 89 = 291.291 > 255, the largest 8-bit value.
- Conclusion: an overflow error has occurred; the stored result is wrong by 256.
Worked example 3 · shift 10110000 right
| Shift right | Register | Denary | Correct? |
|---|---|---|---|
| start | 10110000 | 176 | — |
| 1 place (÷ 2) | 01011000 | 88 | ✓ |
| 2 places (÷ 4) | 00101100 | 44 | ✓ |
| 3 places (÷ 8) | 00010110 | 22 | ✓ |
| 4 places (÷ 16) | 00001011 | 11 | ✓ |
| 5 places (÷ 32) | 00000101 | 5 | ✗ a 1 was lost (176 ÷ 32 = 5.5) |
Worked example 4 · write −94 in 8-bit two's complement
- Write +94 in binary: 94 = 64 + 16 + 8 + 4 + 2 → 01011110.
- Invert every bit (0 ↔ 1): 10100001.inverting on its own gives −95; the +1 corrects it.
- Add 1: 10100001 + 1 = 10100010.
- Check with the headings: −128 + 32 + 2 = −94 ✓. Method 1 agrees: −128 + 34 = −94, and 34 = 32 + 2.
| Place value | −128 | 64 | 32 | 16 | 8 | 4 | 2 | 1 |
|---|---|---|---|---|---|---|---|---|
| Bit | 1 | 0 | 1 | 0 | 0 | 0 | 1 | 0 |
| Adds | −128 | – | 32 | – | – | – | 2 | – |
Worked example 5 · two's complement 11011010 → denary
- The MSB is 1, so the number is negative.
- Add the headings: −128 + 64 + 16 + 8 + 2.
- −128 + 64 = −64; −64 + 16 = −48; −48 + 8 = −40; −40 + 2 = −38.
Shifts as code
// A shift left multiplies by 2; a shift right divides by 2 DECLARE Value, Result : INTEGER Value ← 27 Result ← Value * 4 OUTPUT "Shift left 2 places gives ", Result Result ← Value DIV 2 OUTPUT "Shift right 1 place gives ", Result
value = 27 print("Left 2 =", (value << 2) & 255) print("Left 4 =", (value << 4) & 255) print("Right 1 =", value >> 1)
Left 2 = 108 Left 4 = 176 Right 1 = 13
Try It Yourself 12 min
Goal: add the 8-bit numbers 00011101 + 01100110, showing the carries. Check your answer in denary.
Goal: take 00010101 (21). Shift it 2 places left, then (from the original) 3 places right. Give each result in binary and denary, and say whether each is correct.
Goal: write −45 and −128 in 8-bit two's complement. Then explain why +128 cannot be stored in an 8-bit two's complement register.
Hint
For −128, invert-then-add-1 still works. For +128, what is the largest pattern that starts with a 0?
📝 Exam Practice 10 min
Add the 8-bit binary numbers 10010110 and 01110101. Show your working and comment on your answer.
Mark scheme
- Correct carries shown (1).
- Result
00001011with a 9th bit of 1 /100001011(1). - An overflow error has occurred (1)…
- …because 150 + 117 = 267, which is greater than 255 / needs 9 bits (1).
An 8-bit register holds 00101100.
(a) Show the result of a logical shift one place to the right, and give its denary value. [2]
(b) The original value is shifted two places to the left. Show the result and state the effect on the denary value. [2]
Mark scheme
- (a)
00010110(1); denary 22 (1). - (b)
10110000(1); the value is multiplied by 4 — 44 becomes 176 (1).
(a) Give the 8-bit two's complement value of −100. [1] (b) Give the denary value of the two's complement number 11100100. [1] (c) Convert 73 to an 8-bit binary number, then use two's complement to give −73. [2]
Mark scheme
- (a)
10011100(1). - (b) −128 + 64 + 32 + 4 =
−28(1). - (c) 73 =
01001001(1); −73 =10110111(1).
A register holding 00011011 is shifted four places to the left. Explain why the result is incorrect.
Mark scheme
- A 1 bit is shifted out of the (8-bit) register / the most significant 1 is lost (1).
- So the result is 176 instead of 27 × 16 = 432 / the maximum number of left shifts has been exceeded (1).
Recap & Key Terms 3 min
Add binary right to left, carrying whenever a column passes 1; a 9th bit means overflow. A logical shift left multiplies by 2 per place and right divides by 2 per place; losing a 1 makes the answer wrong. Two's complement gives the MSB the value −128: invert then add 1 to negate.
- Overflow error
- The result of a calculation that is too large for the computer's allocated word size (e.g. a 9th bit in 8-bit addition).
- Logical shift
- Shifting bits left or right in a register; bits shifted out are lost and empty positions are filled with 0s.
- Most significant bit (MSB)
- The left-most bit; in two's complement it has the value −128 and shows the sign.
- Least significant bit (LSB)
- The right-most bit, with place value 1.
- Two's complement
- A method of representing negative numbers in binary; the MSB of an 8-bit number is worth −128.
Homework 1 min
Task (≤ 15 min): (a) Add 01111000 + 10011010 and comment on the result. (b) Convert −20 to 8-bit two's complement, and check your answer. [5]
Model answer
- (a) Sum
100010010(1): a 9th bit is produced, so an overflow error (1). 120 + 154 = 274 > 255; the register keeps00010010= 18, 256 too small (1). - (b) 20 =
00010100→ invert11101011→ add 1 →11101100(1). Check: −128 + 64 + 32 + 8 + 4 = −20 (1).