The Fetch–Decode–Execute Cycle

Syllabus & Goals 3 min

Cambridge 3.1 · Computer architecture Paper 1 · Computer Systems

By the end of this lesson you can:

1. Describe the three stages of the fetch–decode–execute cycle.
2. State which registers are used at each stage.
3. Explain how the program counter moves through a program.

Recap / Warm-Up 5 min

Last lesson you met the registers (PC, MAR, MDR, CIR, ACC). Now you'll see them work together to run an instruction.

Quick starter

Which register holds the address of the next instruction to be fetched?

Key Concept 14 min

The CPU runs a program by repeating one cycle for every instruction: fetch it from memory, decode it, then execute it.

Step by step, with the registers

1. The PC holds the address of the next instruction; this address is copied to the MAR (using the address bus).
2. The instruction at that address is copied into the MDR (using the data bus).
3. The contents of the MDR are copied into the CIR.
4. The PC is incremented by 1 so it points to the next instruction.
5. The instruction in the CIR is decoded, then executed by sending control signals (using the control bus).

Worked Example 12 min

Suppose the PC holds address 20. Trace one full cycle:

The cycle as a loop

Cambridge pseudocode

// The fetch-decode-execute cycle, one pass per instruction
DECLARE PC, MAR : INTEGER
DECLARE CIR : STRING
PC ← 0
WHILE MoreInstructions = TRUE
    MAR ← PC
    CIR ← Memory[MAR]
    PC ← PC + 1
    CALL Decode(CIR)
    CALL Execute(CIR)
ENDWHILE

A simplified version in Python (IDLE)

# A simplified fetch-decode-execute cycle
pc = 0
memory = ["LOAD", "ADD", "STORE", "STOP"]
while pc < len(memory):
    cir = memory[pc]
    pc = pc + 1
    print("Decode and execute:", cir)
    if cir == "STOP":
        break

Output

Decode and execute: LOAD
Decode and execute: ADD
Decode and execute: STORE
Decode and execute: STOP

Try It Yourself 12 min

📝 Exam Practice 10 min

Recap & Key Terms 3 min

The CPU loops: fetch (PC → MAR, instruction → MDR → CIR, PC + 1), decode(the CU works out the instruction) and execute (control signals sent; the ALU/ACC do any sums). This repeats for every instruction.

Fetch–decode–execute cycle

The repeating process by which the CPU runs each instruction.

Program Counter (PC)

Holds the address of the next instruction; incremented each fetch.

Current Instruction Register (CIR)

Holds the instruction being decoded and executed.

Accumulator (ACC)

Holds intermediate results during ALU calculations.

Homework 1 min

Task (≤ 15 min): Write the five steps of one fetch–decode–execute cycle in order, naming the register used at each step.